According to the studies of the present inventors, there have been proposed the following control technique for the semiconductor device.
For example, dynamic random access memories (hereinafter referred to as “DRAM”) that is one of the semiconductor devices have been incorporated in large numbers into diverse electronic devices that are used by us usual day. Also, with the low power consumption of the devices and the needs for the high performance in recent years, the high performance such as the lower power, the higher speed, or the higher capacity has been strongly demanded for the incorporated DRAM.
One of the most effective means for realizing the high-performance DRAM is to miniaturize memory cells. The miniaturization makes it possible to reduce the memory cell in sizes. As a result, the respective lengths of word lines and data lines which are connected to the memory cells are shortened, thereby making it possible to reduce the parasitic capacitance of the word lines and the data lines. Accordingly, the low-voltage operation can be conducted, and the low power consumption can be realized. Also, since the memory cell is reduced in the size, the capacity of the memory can be increased, and the higher performance of the device can be realized. In this way, the miniaturization greatly contributes to the higher performance of the DRAM.
However, as the nodes of 65 nm and 45 nm are progressively miniaturized, not only the advantage of the above-mentioned high performance but also diverse adverse effects are developed. The main adverse effects are to increase the variation of the device characteristics which are produced by the miniaturization. In the present specification, the variation in the device characteristics is directed to, for example, a dispersion value (deviation from a mean value) of a threshold voltage of a transistor, or the magnitude of a leakage current that flows from the transistor. The device variation causes the deterioration in the performance of the DRAM, it is desirable to suppress the device variation as much as possible. In particular, because the threshold voltage of the transistor that is used in the sense amplifier greatly influences on the operating speed of the DRAM, and influences the power consumption performance when the DRAM stands by, it is strongly desirable to reduce the variation of the threshold voltage.
In order to reduce the variation in the threshold voltage of the transistor that is used in the sense amplifier, it is necessary to reduce the manufacturing error in the channel length or the channel width. However, a tendency is made to increase the manufacturing error as the miniaturization is advanced, and it is difficult to reduce the manufacturing error more than that in the conventional art, and to reduce the variation in the threshold voltage. In other words, a variation in the threshold voltage of the cell transistor due to the short channel effect is increased year by year. When it is assumed that the variation in the threshold voltage has a regular distribution, the variation (a standard deviation α) increases, and when the memory capacity (population parameter) is increased, the threshold voltage of the sense amplifier transistor under the worst conditions is necessarily lowered (or heightened). For that reason, the control for setting the substrate voltage deeply (or shallowly) so as to ensure the conditions of the sense speed and the power consumption is essential even under the condition of the threshold voltage of the worst sense amplifier transistor when the threshold voltage that is lowered by the short channel effect is assumed.
As the substrate voltage control technique described above, a technique disclosed in JP-A No. 2005-86819 has been proposed. JP-A No. 2005-86819 discloses a technique by which the substrate voltage of the transistor is controlled to change the threshold voltage in order to hold the circuit speed constant with respect to the process, the supply voltage, and the temperature variation. The threshold voltage is so changed as to reduce the variation in the threshold voltage and hold the operating speed of the transistor constant. Also, in the high-temperature or low-threshold voltage process condition, the threshold voltage is so increased as to reduce the leakage current.